I live in Pittsburgh, Pennsylvania, United States – UCT-5 (Americas/New_York)
I got a Lattice MachXO2 eval board on loan from a friend. It appears to have the right logic level support, a 400Mhz (max) internal PLL, a SPI slave model, and 30Kbytes of internal ram – I should be able to combine that into a SPI accessible logic probe.
We shall see if my FPGA design skills are up to the task!