Got a Seleae Logic16 on loan from a friend at work, and already discovered some novel things.
The Pin 14/16 is a LVCMOS3.3 signal set. Pin 14 appears to be bi-directional, and Pin 16 is a 4Mhz clock.
Pin 16 is only active during a data transaction. Pin 14 changes at the middle of a Pin 16 clock cycle, and appears to be a dual-data rate (valid on both high and low clock edge) signal.
The Pin 13 seems to be involved in ink ejection. I need to count the # of cycles and do some math on it.
Ping 4/5, 7/8, and 10/11 are just plain weird. I need to get an oscilloscope on them, as the Seleae sees them at 3.3v logic as flatlines (as expected from my voltage readings) but at 1.8v logic sees them as high with weird glitches (ie, if I sample at 100Mhz, I see 10ns glitches, if I sample at 50mhz, I see 20ns glitches, etc).
I am having the troubling suspicion that 4/5, 7/8, and 10/11 are SSTL or HSTL waveforms, not LVCMOS1.8, and that the Seleae just can’t handle them properly.
I might be able borrow an oscilloscope from a friend at work to see if I can identify the waveform….