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Looking at the all the signals together on my scope, i assumed that high signal to be a 1 and low a 0 this also fits with the amount of data needed for the nozzle’s and there is a clock signal on one of the LVDS lines.
The OPA was just a random op-amp i put in the sch to remind me there was one on the small PCB next to the printhead..
The LVDS receiver we used in the end was a DS90LV048A but we still get 100Mhz noise 50% of the time when there is no signal. any pulse you see that is less than 20ns you can ignore. I put the datasheet of the LVDS receiver in the eagle folder and added a Scan of the printout of the nozzletest that i used to trance the signals.
link to the google drive
https://drive.google.com/folderview?id=0Byg2WK1ajT-ATHA0R1dSQndfWDQ&usp=sharing
Hi,
After our meeting with Ytec and seeing the Plan-B@work we spend some time reverse engineering the signals between a HP7500A printer and the CN642 Head.
All working files will be uploaded to a Google drive so other can look at the data.Appart from the low speed signals < 1Mhz there are 4 LVDS channels (1 clock and 3 data) we added a LVDS receiver to the breakout to be able to grab these signals. It seems there is no encription and it looks like a straight forward shift register (at least for the black) the other 2 LVDS channels control the other 3 colors. Allot more looking at bits is needed..
Feel free to dig through the files in the google drive and dont hesitate to comment. More files will be added over time.
